Tilera wants to put a direct competition to Intel’s current generation processor, Sandybridge, in the server environment. Their desperate chips are based on 40nm fabrication technology based on 64-bit architecture. Tilera Gx family have between 36 and 100 cores.
The company believes that Intel’s x86 architecture is built to work for generic applications that are mostly limited to single cores and few threads, they cannot scale well beyond to levels where Intel cannot. Tilera Gx family targets high-throughput applications.
Tile Gx family has 3 flavors 36-core Gx3036, the 64-core GX3064 and the 100-core Gx3100. All of them target high performance multi-core computing designed for high-end web servers & applicatons including vast databases and heavy frameworks.
If the company Tilera is to be believed, the Gx family is at least 10 times power efficient, per-watt. With 100 cores on a single die, the processor consumes less than 48 watts, which is way lower than Sandybridge. Each core rated at less than 0.5 watt is the among the most efficeient processors ever designed for servers.
Tile Gx Family Specs:
- An array of 16 to 100 general-purpose processor cores (tiles)
- 64-bit VLIW processors with a 64-bit instruction bundle
- Three-way pipeline with up to three instructions per cycle
- 32K L1i cache, 32K L1d cache, 256K L2 cache per tile
- Up to 750 billion operations per second (BOPS)
- Up to 200 Tbps of on-chip mesh interconnect
- Over 500 Gbps memory bandwidth with four 64-bit DDR3 controllers
Sandy bridge consumes upto 95W, and Xeon goes upto 130W.
Tilera goes further in criticizing Intel’s upcoming architecture “Knights Ferry n 2012”. They argue that
“an x86 is an x86, whether it’s Atom cores, Pentium cores — the overhead that you’re carrying is the same. You need to carry the overhead to be binary compatible,” Bishara said. “What [Intel] do, even with Atom, is lower the frequency to get lower power and to get more cores in the same chip.”
Tilera’s Gx3036 would become available around July, followed by Gx3064 and Gx3100 in Q1 2012 and stratton 28nm chip in 2012 going upto 200 cores. With the big plans on its line, its already in talks with big cloud players like Amazon, Google, Microsoft.
Tilera is non-x86, but Dev Toolchain would be available
Gx chips are compatible with 2.6.36 kernel release of Linux showing love for CentOS. The applications can be written in any of the popular languages: C and C++, Java, PHP, Perl and Python, which are implemented via a GCC compiler that has been ported to Tilera’s architecture.
Tilera’s Architecture – The secret recipe
The DNA of the multicore super-performance is the way it communicated among multiple-cores. Gx chips pass information between cores via a mesh network, which distributes the cache throughout the processor and allows for multiple connections between individual cores. Applications can access the on-chip network, and can fully use it to communicate between cores, the result is a superior throughput in the IO among the chips, and better cache management as compared to sandybridge.
We do believe that Tilera is bringing some breakthrough improvements in the CPU architecture especially on the server sides. The ultimate question that still remains unanswered is “Will the customers (big cloud players) port apps to a new architecture?, would it be easy enough?”
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